sha512-armv8: Pull the .16b suffixes out of the variables

In aarch64 AdvSIMD (aka NEON), each 128-bit vector register can be
viewed in different ways. E.g. v0.16b is v0 viewed as 16 bytes, while
v0.4s is v0 viewed as 4 32-bit words. (s stands for "single word".)

In the assembly language, some instructions take multiple suffixes,
while others can only be used with one suffix. A single register may
need to be used with multiple suffixes in a given function. This makes
packaging the suffixes into variables tricky because the code cannot
choose which one.

This file works by just always writing .16b and then using regexes at
the bottom to fix them up, sometimes by inventing ad-hoc instructions
like add.i32. Other times, it just always gets them wrong (sha256 and
sha512 instructions) but gets by because the regexes rewrite them into
bytes anyway.

So this file looks like more "normal" aarch64 assembly, let's remove
these. This first commit pulls the suffixes out of the variables and
into where they are used. Other than whitespace to realign the comments,
this should not change the value of $code.

Bug: 478924351
Change-Id: I9cad9b1552eb6115240e2e80096e511d594374c5
Reviewed-on: https://boringssl-review.googlesource.com/c/boringssl/+/87527
Commit-Queue: David Benjamin <davidben@google.com>
Reviewed-by: Lily Chen <chlily@google.com>

crypto/fipsmodule/sha/asm/sha512-armv8.pl

diff --git a/crypto/fipsmodule/sha/asm/sha512-armv8.pl b/crypto/fipsmodule/sha/asm/sha512-armv8.pl
index 79ca630..dc4ffef 100644
--- a/crypto/fipsmodule/sha/asm/sha512-armv8.pl
+++ b/crypto/fipsmodule/sha/asm/sha512-armv8.pl
@@ -326,10 +326,10 @@
 if ($SZ==4) {
 my $Ktbl="x3";
 
-my ($ABCD,$EFGH,$abcd)=map("v$_.16b",(0..2));
-my @MSG=map("v$_.16b",(4..7));
-my ($W0,$W1)=("v16.4s","v17.4s");
-my ($ABCD_SAVE,$EFGH_SAVE)=("v18.16b","v19.16b");
+my ($ABCD,$EFGH,$abcd)=map("v$_",(0..2));
+my @MSG=map("v$_",(4..7));
+my ($W0,$W1)=("v16","v17");
+my ($ABCD_SAVE,$EFGH_SAVE)=("v18","v19");
 
 $code.=<<___;
 .text
@@ -343,64 +343,64 @@
 	stp		x29,x30,[sp,#-16]!
 	add		x29,sp,#0
 
-	ld1.32		{$ABCD,$EFGH},[$ctx]
+	ld1.32		{$ABCD.16b,$EFGH.16b},[$ctx]
 	adrp		$Ktbl,:pg_hi21:.LK256
 	add		$Ktbl,$Ktbl,:lo12:.LK256
 
 .Loop_hw:
-	ld1		{@MSG[0]-@MSG[3]},[$inp],#64
+	ld1		{@MSG[0].16b-@MSG[3].16b},[$inp],#64
 	sub		$num,$num,#1
-	ld1.32		{$W0},[$Ktbl],#16
-	rev32		@MSG[0],@MSG[0]
-	rev32		@MSG[1],@MSG[1]
-	rev32		@MSG[2],@MSG[2]
-	rev32		@MSG[3],@MSG[3]
-	orr		$ABCD_SAVE,$ABCD,$ABCD		// offload
-	orr		$EFGH_SAVE,$EFGH,$EFGH
+	ld1.32		{$W0.4s},[$Ktbl],#16
+	rev32		@MSG[0].16b,@MSG[0].16b
+	rev32		@MSG[1].16b,@MSG[1].16b
+	rev32		@MSG[2].16b,@MSG[2].16b
+	rev32		@MSG[3].16b,@MSG[3].16b
+	orr		$ABCD_SAVE.16b,$ABCD.16b,$ABCD.16b		// offload
+	orr		$EFGH_SAVE.16b,$EFGH.16b,$EFGH.16b
 ___
 for($i=0;$i<12;$i++) {
 $code.=<<___;
-	ld1.32		{$W1},[$Ktbl],#16
-	add.i32		$W0,$W0,@MSG[0]
-	sha256su0	@MSG[0],@MSG[1]
-	orr		$abcd,$ABCD,$ABCD
-	sha256h		$ABCD,$EFGH,$W0
-	sha256h2	$EFGH,$abcd,$W0
-	sha256su1	@MSG[0],@MSG[2],@MSG[3]
+	ld1.32		{$W1.4s},[$Ktbl],#16
+	add.i32		$W0.4s,$W0.4s,@MSG[0].16b
+	sha256su0	@MSG[0].16b,@MSG[1].16b
+	orr		$abcd.16b,$ABCD.16b,$ABCD.16b
+	sha256h		$ABCD.16b,$EFGH.16b,$W0.4s
+	sha256h2	$EFGH.16b,$abcd.16b,$W0.4s
+	sha256su1	@MSG[0].16b,@MSG[2].16b,@MSG[3].16b
 ___
 	($W0,$W1)=($W1,$W0);	push(@MSG,shift(@MSG));
 }
 $code.=<<___;
-	ld1.32		{$W1},[$Ktbl],#16
-	add.i32		$W0,$W0,@MSG[0]
-	orr		$abcd,$ABCD,$ABCD
-	sha256h		$ABCD,$EFGH,$W0
-	sha256h2	$EFGH,$abcd,$W0
+	ld1.32		{$W1.4s},[$Ktbl],#16
+	add.i32		$W0.4s,$W0.4s,@MSG[0].16b
+	orr		$abcd.16b,$ABCD.16b,$ABCD.16b
+	sha256h		$ABCD.16b,$EFGH.16b,$W0.4s
+	sha256h2	$EFGH.16b,$abcd.16b,$W0.4s
 
-	ld1.32		{$W0},[$Ktbl],#16
-	add.i32		$W1,$W1,@MSG[1]
-	orr		$abcd,$ABCD,$ABCD
-	sha256h		$ABCD,$EFGH,$W1
-	sha256h2	$EFGH,$abcd,$W1
+	ld1.32		{$W0.4s},[$Ktbl],#16
+	add.i32		$W1.4s,$W1.4s,@MSG[1].16b
+	orr		$abcd.16b,$ABCD.16b,$ABCD.16b
+	sha256h		$ABCD.16b,$EFGH.16b,$W1.4s
+	sha256h2	$EFGH.16b,$abcd.16b,$W1.4s
 
-	ld1.32		{$W1},[$Ktbl]
-	add.i32		$W0,$W0,@MSG[2]
+	ld1.32		{$W1.4s},[$Ktbl]
+	add.i32		$W0.4s,$W0.4s,@MSG[2].16b
 	sub		$Ktbl,$Ktbl,#$rounds*$SZ-16	// rewind
-	orr		$abcd,$ABCD,$ABCD
-	sha256h		$ABCD,$EFGH,$W0
-	sha256h2	$EFGH,$abcd,$W0
+	orr		$abcd.16b,$ABCD.16b,$ABCD.16b
+	sha256h		$ABCD.16b,$EFGH.16b,$W0.4s
+	sha256h2	$EFGH.16b,$abcd.16b,$W0.4s
 
-	add.i32		$W1,$W1,@MSG[3]
-	orr		$abcd,$ABCD,$ABCD
-	sha256h		$ABCD,$EFGH,$W1
-	sha256h2	$EFGH,$abcd,$W1
+	add.i32		$W1.4s,$W1.4s,@MSG[3].16b
+	orr		$abcd.16b,$ABCD.16b,$ABCD.16b
+	sha256h		$ABCD.16b,$EFGH.16b,$W1.4s
+	sha256h2	$EFGH.16b,$abcd.16b,$W1.4s
 
-	add.i32		$ABCD,$ABCD,$ABCD_SAVE
-	add.i32		$EFGH,$EFGH,$EFGH_SAVE
+	add.i32		$ABCD.16b,$ABCD.16b,$ABCD_SAVE.16b
+	add.i32		$EFGH.16b,$EFGH.16b,$EFGH_SAVE.16b
 
 	cbnz		$num,.Loop_hw
 
-	st1.32		{$ABCD,$EFGH},[$ctx]
+	st1.32		{$ABCD.16b,$EFGH.16b},[$ctx]
 
 	ldr		x29,[sp],#16
 	ret
@@ -412,11 +412,11 @@
 if ($SZ==8) {
 my $Ktbl="x3";
 
-my @H = map("v$_.16b",(0..4));
-my ($fg,$de,$m9_10)=map("v$_.16b",(5..7));
-my @MSG=map("v$_.16b",(16..23));
-my ($W0,$W1)=("v24.2d","v25.2d");
-my ($AB,$CD,$EF,$GH)=map("v$_.16b",(26..29));
+my @H = map("v$_",(0..4));
+my ($fg,$de,$m9_10)=map("v$_",(5..7));
+my @MSG=map("v$_",(16..23));
+my ($W0,$W1)=("v24","v25");
+my ($AB,$CD,$EF,$GH)=map("v$_",(26..29));
 
 $code.=<<___;
 .text
@@ -430,83 +430,83 @@
 	stp		x29,x30,[sp,#-16]!
 	add		x29,sp,#0
 
-	ld1		{@MSG[0]-@MSG[3]},[$inp],#64	// load input
-	ld1		{@MSG[4]-@MSG[7]},[$inp],#64
+	ld1		{@MSG[0].16b-@MSG[3].16b},[$inp],#64	// load input
+	ld1		{@MSG[4].16b-@MSG[7].16b},[$inp],#64
 
-	ld1.64		{@H[0]-@H[3]},[$ctx]		// load context
+	ld1.64		{@H[0].16b-@H[3].16b},[$ctx]		// load context
 	adrp		$Ktbl,:pg_hi21:.LK512
 	add		$Ktbl,$Ktbl,:lo12:.LK512
 
-	rev64		@MSG[0],@MSG[0]
-	rev64		@MSG[1],@MSG[1]
-	rev64		@MSG[2],@MSG[2]
-	rev64		@MSG[3],@MSG[3]
-	rev64		@MSG[4],@MSG[4]
-	rev64		@MSG[5],@MSG[5]
-	rev64		@MSG[6],@MSG[6]
-	rev64		@MSG[7],@MSG[7]
+	rev64		@MSG[0].16b,@MSG[0].16b
+	rev64		@MSG[1].16b,@MSG[1].16b
+	rev64		@MSG[2].16b,@MSG[2].16b
+	rev64		@MSG[3].16b,@MSG[3].16b
+	rev64		@MSG[4].16b,@MSG[4].16b
+	rev64		@MSG[5].16b,@MSG[5].16b
+	rev64		@MSG[6].16b,@MSG[6].16b
+	rev64		@MSG[7].16b,@MSG[7].16b
 	b		.Loop_hw
 
 .align	4
 .Loop_hw:
-	ld1.64		{$W0},[$Ktbl],#16
+	ld1.64		{$W0.2d},[$Ktbl],#16
 	subs		$num,$num,#1
 	sub		x4,$inp,#128
-	orr		$AB,@H[0],@H[0]			// offload
-	orr		$CD,@H[1],@H[1]
-	orr		$EF,@H[2],@H[2]
-	orr		$GH,@H[3],@H[3]
-	csel		$inp,$inp,x4,ne			// conditional rewind
+	orr		$AB.16b,@H[0].16b,@H[0].16b		// offload
+	orr		$CD.16b,@H[1].16b,@H[1].16b
+	orr		$EF.16b,@H[2].16b,@H[2].16b
+	orr		$GH.16b,@H[3].16b,@H[3].16b
+	csel		$inp,$inp,x4,ne				// conditional rewind
 ___
 for($i=0;$i<32;$i++) {
 $code.=<<___;
-	add.i64		$W0,$W0,@MSG[0]
-	ld1.64		{$W1},[$Ktbl],#16
-	ext		$W0,$W0,$W0,#8
-	ext		$fg,@H[2],@H[3],#8
-	ext		$de,@H[1],@H[2],#8
-	add.i64		@H[3],@H[3],$W0			// "T1 + H + K512[i]"
-	 sha512su0	@MSG[0],@MSG[1]
-	 ext		$m9_10,@MSG[4],@MSG[5],#8
-	sha512h		@H[3],$fg,$de
-	 sha512su1	@MSG[0],@MSG[7],$m9_10
-	add.i64		@H[4],@H[1],@H[3]		// "D + T1"
-	sha512h2	@H[3],$H[1],@H[0]
+	add.i64		$W0.2d,$W0.2d,@MSG[0].16b
+	ld1.64		{$W1.2d},[$Ktbl],#16
+	ext		$W0.2d,$W0.2d,$W0.2d,#8
+	ext		$fg.16b,@H[2].16b,@H[3].16b,#8
+	ext		$de.16b,@H[1].16b,@H[2].16b,#8
+	add.i64		@H[3].16b,@H[3].16b,$W0.2d		// "T1 + H + K512[i]"
+	 sha512su0	@MSG[0].16b,@MSG[1].16b
+	 ext		$m9_10.16b,@MSG[4].16b,@MSG[5].16b,#8
+	sha512h		@H[3].16b,$fg.16b,$de.16b
+	 sha512su1	@MSG[0].16b,@MSG[7].16b,$m9_10.16b
+	add.i64		@H[4].16b,@H[1].16b,@H[3].16b		// "D + T1"
+	sha512h2	@H[3].16b,$H[1].16b,@H[0].16b
 ___
 	($W0,$W1)=($W1,$W0);	push(@MSG,shift(@MSG));
 	@H = (@H[3],@H[0],@H[4],@H[2],@H[1]);
 }
 for(;$i<40;$i++) {
 $code.=<<___	if ($i<39);
-	ld1.64		{$W1},[$Ktbl],#16
+	ld1.64		{$W1.2d},[$Ktbl],#16
 ___
 $code.=<<___	if ($i==39);
-	sub		$Ktbl,$Ktbl,#$rounds*$SZ	// rewind
+	sub		$Ktbl,$Ktbl,#$rounds*$SZ		// rewind
 ___
 $code.=<<___;
-	add.i64		$W0,$W0,@MSG[0]
-	 ld1		{@MSG[0]},[$inp],#16		// load next input
-	ext		$W0,$W0,$W0,#8
-	ext		$fg,@H[2],@H[3],#8
-	ext		$de,@H[1],@H[2],#8
-	add.i64		@H[3],@H[3],$W0			// "T1 + H + K512[i]"
-	sha512h		@H[3],$fg,$de
-	 rev64		@MSG[0],@MSG[0]
-	add.i64		@H[4],@H[1],@H[3]		// "D + T1"
-	sha512h2	@H[3],$H[1],@H[0]
+	add.i64		$W0.2d,$W0.2d,@MSG[0].16b
+	 ld1		{@MSG[0].16b},[$inp],#16		// load next input
+	ext		$W0.2d,$W0.2d,$W0.2d,#8
+	ext		$fg.16b,@H[2].16b,@H[3].16b,#8
+	ext		$de.16b,@H[1].16b,@H[2].16b,#8
+	add.i64		@H[3].16b,@H[3].16b,$W0.2d		// "T1 + H + K512[i]"
+	sha512h		@H[3].16b,$fg.16b,$de.16b
+	 rev64		@MSG[0].16b,@MSG[0].16b
+	add.i64		@H[4].16b,@H[1].16b,@H[3].16b		// "D + T1"
+	sha512h2	@H[3].16b,$H[1].16b,@H[0].16b
 ___
 	($W0,$W1)=($W1,$W0);	push(@MSG,shift(@MSG));
 	@H = (@H[3],@H[0],@H[4],@H[2],@H[1]);
 }
 $code.=<<___;
-	add.i64		@H[0],@H[0],$AB			// accumulate
-	add.i64		@H[1],@H[1],$CD
-	add.i64		@H[2],@H[2],$EF
-	add.i64		@H[3],@H[3],$GH
+	add.i64		@H[0].16b,@H[0].16b,$AB.16b		// accumulate
+	add.i64		@H[1].16b,@H[1].16b,$CD.16b
+	add.i64		@H[2].16b,@H[2].16b,$EF.16b
+	add.i64		@H[3].16b,@H[3].16b,$GH.16b
 
 	cbnz		$num,.Loop_hw
 
-	st1.64		{@H[0]-@H[3]},[$ctx]		// store context
+	st1.64		{@H[0].16b-@H[3].16b},[$ctx]		// store context
 
 	ldr		x29,[sp],#16
 	ret

gen/bcm/sha512-armv8-apple.S

diff --git a/gen/bcm/sha512-armv8-apple.S b/gen/bcm/sha512-armv8-apple.S
index b56252e..1a523cc 100644
--- a/gen/bcm/sha512-armv8-apple.S
+++ b/gen/bcm/sha512-armv8-apple.S
@@ -1102,17 +1102,17 @@
 	ld1	{v24.2d},[x3],#16
 	subs	x2,x2,#1
 	sub	x4,x1,#128
-	orr	v26.16b,v0.16b,v0.16b			// offload
+	orr	v26.16b,v0.16b,v0.16b		// offload
 	orr	v27.16b,v1.16b,v1.16b
 	orr	v28.16b,v2.16b,v2.16b
 	orr	v29.16b,v3.16b,v3.16b
-	csel	x1,x1,x4,ne			// conditional rewind
+	csel	x1,x1,x4,ne				// conditional rewind
 	add	v24.2d,v24.2d,v16.2d
 	ld1	{v25.2d},[x3],#16
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08230	//sha512su0 v16.16b,v17.16b
 	ext	v7.16b,v20.16b,v21.16b,#8
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1124,7 +1124,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08251	//sha512su0 v17.16b,v18.16b
 	ext	v7.16b,v21.16b,v22.16b,#8
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1136,7 +1136,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08272	//sha512su0 v18.16b,v19.16b
 	ext	v7.16b,v22.16b,v23.16b,#8
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1148,7 +1148,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08293	//sha512su0 v19.16b,v20.16b
 	ext	v7.16b,v23.16b,v16.16b,#8
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1160,7 +1160,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082b4	//sha512su0 v20.16b,v21.16b
 	ext	v7.16b,v16.16b,v17.16b,#8
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1172,7 +1172,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec082d5	//sha512su0 v21.16b,v22.16b
 	ext	v7.16b,v17.16b,v18.16b,#8
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1184,7 +1184,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082f6	//sha512su0 v22.16b,v23.16b
 	ext	v7.16b,v18.16b,v19.16b,#8
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1196,7 +1196,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08217	//sha512su0 v23.16b,v16.16b
 	ext	v7.16b,v19.16b,v20.16b,#8
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1208,7 +1208,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08230	//sha512su0 v16.16b,v17.16b
 	ext	v7.16b,v20.16b,v21.16b,#8
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1220,7 +1220,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08251	//sha512su0 v17.16b,v18.16b
 	ext	v7.16b,v21.16b,v22.16b,#8
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1232,7 +1232,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08272	//sha512su0 v18.16b,v19.16b
 	ext	v7.16b,v22.16b,v23.16b,#8
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1244,7 +1244,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08293	//sha512su0 v19.16b,v20.16b
 	ext	v7.16b,v23.16b,v16.16b,#8
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1256,7 +1256,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082b4	//sha512su0 v20.16b,v21.16b
 	ext	v7.16b,v16.16b,v17.16b,#8
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1268,7 +1268,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec082d5	//sha512su0 v21.16b,v22.16b
 	ext	v7.16b,v17.16b,v18.16b,#8
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1280,7 +1280,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082f6	//sha512su0 v22.16b,v23.16b
 	ext	v7.16b,v18.16b,v19.16b,#8
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1292,7 +1292,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08217	//sha512su0 v23.16b,v16.16b
 	ext	v7.16b,v19.16b,v20.16b,#8
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1304,7 +1304,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08230	//sha512su0 v16.16b,v17.16b
 	ext	v7.16b,v20.16b,v21.16b,#8
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1316,7 +1316,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08251	//sha512su0 v17.16b,v18.16b
 	ext	v7.16b,v21.16b,v22.16b,#8
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1328,7 +1328,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08272	//sha512su0 v18.16b,v19.16b
 	ext	v7.16b,v22.16b,v23.16b,#8
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1340,7 +1340,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08293	//sha512su0 v19.16b,v20.16b
 	ext	v7.16b,v23.16b,v16.16b,#8
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1352,7 +1352,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082b4	//sha512su0 v20.16b,v21.16b
 	ext	v7.16b,v16.16b,v17.16b,#8
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1364,7 +1364,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec082d5	//sha512su0 v21.16b,v22.16b
 	ext	v7.16b,v17.16b,v18.16b,#8
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1376,7 +1376,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082f6	//sha512su0 v22.16b,v23.16b
 	ext	v7.16b,v18.16b,v19.16b,#8
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1388,7 +1388,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08217	//sha512su0 v23.16b,v16.16b
 	ext	v7.16b,v19.16b,v20.16b,#8
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1400,7 +1400,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08230	//sha512su0 v16.16b,v17.16b
 	ext	v7.16b,v20.16b,v21.16b,#8
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1412,7 +1412,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08251	//sha512su0 v17.16b,v18.16b
 	ext	v7.16b,v21.16b,v22.16b,#8
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1424,7 +1424,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08272	//sha512su0 v18.16b,v19.16b
 	ext	v7.16b,v22.16b,v23.16b,#8
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1436,7 +1436,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08293	//sha512su0 v19.16b,v20.16b
 	ext	v7.16b,v23.16b,v16.16b,#8
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1448,7 +1448,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082b4	//sha512su0 v20.16b,v21.16b
 	ext	v7.16b,v16.16b,v17.16b,#8
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1460,7 +1460,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec082d5	//sha512su0 v21.16b,v22.16b
 	ext	v7.16b,v17.16b,v18.16b,#8
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1472,7 +1472,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082f6	//sha512su0 v22.16b,v23.16b
 	ext	v7.16b,v18.16b,v19.16b,#8
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1484,7 +1484,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08217	//sha512su0 v23.16b,v16.16b
 	ext	v7.16b,v19.16b,v20.16b,#8
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1497,7 +1497,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
 	rev64	v16.16b,v16.16b
 	add	v0.2d,v3.2d,v4.2d		// "D + T1"
@@ -1508,7 +1508,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
 	rev64	v17.16b,v17.16b
 	add	v3.2d,v2.2d,v1.2d		// "D + T1"
@@ -1519,7 +1519,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
 	rev64	v18.16b,v18.16b
 	add	v2.2d,v4.2d,v0.2d		// "D + T1"
@@ -1530,7 +1530,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
 	rev64	v19.16b,v19.16b
 	add	v4.2d,v1.2d,v3.2d		// "D + T1"
@@ -1541,7 +1541,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
 	rev64	v20.16b,v20.16b
 	add	v1.2d,v0.2d,v2.2d		// "D + T1"
@@ -1552,7 +1552,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
 	rev64	v21.16b,v21.16b
 	add	v0.2d,v3.2d,v4.2d		// "D + T1"
@@ -1563,23 +1563,23 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
 	rev64	v22.16b,v22.16b
 	add	v3.2d,v2.2d,v1.2d		// "D + T1"
 .long	0xce648441	//sha512h2 v1.16b,v2.16b,v4.16b
-	sub	x3,x3,#80*8	// rewind
+	sub	x3,x3,#80*8		// rewind
 	add	v25.2d,v25.2d,v23.2d
 	ld1	{v23.16b},[x1],#16		// load next input
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
 	rev64	v23.16b,v23.16b
 	add	v2.2d,v4.2d,v0.2d		// "D + T1"
 .long	0xce618480	//sha512h2 v0.16b,v4.16b,v1.16b
-	add	v0.2d,v0.2d,v26.2d			// accumulate
+	add	v0.2d,v0.2d,v26.2d		// accumulate
 	add	v1.2d,v1.2d,v27.2d
 	add	v2.2d,v2.2d,v28.2d
 	add	v3.2d,v3.2d,v29.2d

gen/bcm/sha512-armv8-linux.S

diff --git a/gen/bcm/sha512-armv8-linux.S b/gen/bcm/sha512-armv8-linux.S
index 793e9e6..ba33c06 100644
--- a/gen/bcm/sha512-armv8-linux.S
+++ b/gen/bcm/sha512-armv8-linux.S
@@ -1102,17 +1102,17 @@
 	ld1	{v24.2d},[x3],#16
 	subs	x2,x2,#1
 	sub	x4,x1,#128
-	orr	v26.16b,v0.16b,v0.16b			// offload
+	orr	v26.16b,v0.16b,v0.16b		// offload
 	orr	v27.16b,v1.16b,v1.16b
 	orr	v28.16b,v2.16b,v2.16b
 	orr	v29.16b,v3.16b,v3.16b
-	csel	x1,x1,x4,ne			// conditional rewind
+	csel	x1,x1,x4,ne				// conditional rewind
 	add	v24.2d,v24.2d,v16.2d
 	ld1	{v25.2d},[x3],#16
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec08230	//sha512su0 v16.16b,v17.16b
 	ext	v7.16b,v20.16b,v21.16b,#8
 .inst	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1124,7 +1124,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec08251	//sha512su0 v17.16b,v18.16b
 	ext	v7.16b,v21.16b,v22.16b,#8
 .inst	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1136,7 +1136,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec08272	//sha512su0 v18.16b,v19.16b
 	ext	v7.16b,v22.16b,v23.16b,#8
 .inst	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1148,7 +1148,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec08293	//sha512su0 v19.16b,v20.16b
 	ext	v7.16b,v23.16b,v16.16b,#8
 .inst	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1160,7 +1160,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec082b4	//sha512su0 v20.16b,v21.16b
 	ext	v7.16b,v16.16b,v17.16b,#8
 .inst	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1172,7 +1172,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec082d5	//sha512su0 v21.16b,v22.16b
 	ext	v7.16b,v17.16b,v18.16b,#8
 .inst	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1184,7 +1184,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec082f6	//sha512su0 v22.16b,v23.16b
 	ext	v7.16b,v18.16b,v19.16b,#8
 .inst	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1196,7 +1196,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec08217	//sha512su0 v23.16b,v16.16b
 	ext	v7.16b,v19.16b,v20.16b,#8
 .inst	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1208,7 +1208,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec08230	//sha512su0 v16.16b,v17.16b
 	ext	v7.16b,v20.16b,v21.16b,#8
 .inst	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1220,7 +1220,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec08251	//sha512su0 v17.16b,v18.16b
 	ext	v7.16b,v21.16b,v22.16b,#8
 .inst	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1232,7 +1232,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec08272	//sha512su0 v18.16b,v19.16b
 	ext	v7.16b,v22.16b,v23.16b,#8
 .inst	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1244,7 +1244,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec08293	//sha512su0 v19.16b,v20.16b
 	ext	v7.16b,v23.16b,v16.16b,#8
 .inst	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1256,7 +1256,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec082b4	//sha512su0 v20.16b,v21.16b
 	ext	v7.16b,v16.16b,v17.16b,#8
 .inst	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1268,7 +1268,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec082d5	//sha512su0 v21.16b,v22.16b
 	ext	v7.16b,v17.16b,v18.16b,#8
 .inst	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1280,7 +1280,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec082f6	//sha512su0 v22.16b,v23.16b
 	ext	v7.16b,v18.16b,v19.16b,#8
 .inst	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1292,7 +1292,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec08217	//sha512su0 v23.16b,v16.16b
 	ext	v7.16b,v19.16b,v20.16b,#8
 .inst	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1304,7 +1304,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec08230	//sha512su0 v16.16b,v17.16b
 	ext	v7.16b,v20.16b,v21.16b,#8
 .inst	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1316,7 +1316,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec08251	//sha512su0 v17.16b,v18.16b
 	ext	v7.16b,v21.16b,v22.16b,#8
 .inst	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1328,7 +1328,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec08272	//sha512su0 v18.16b,v19.16b
 	ext	v7.16b,v22.16b,v23.16b,#8
 .inst	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1340,7 +1340,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec08293	//sha512su0 v19.16b,v20.16b
 	ext	v7.16b,v23.16b,v16.16b,#8
 .inst	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1352,7 +1352,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec082b4	//sha512su0 v20.16b,v21.16b
 	ext	v7.16b,v16.16b,v17.16b,#8
 .inst	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1364,7 +1364,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec082d5	//sha512su0 v21.16b,v22.16b
 	ext	v7.16b,v17.16b,v18.16b,#8
 .inst	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1376,7 +1376,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec082f6	//sha512su0 v22.16b,v23.16b
 	ext	v7.16b,v18.16b,v19.16b,#8
 .inst	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1388,7 +1388,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec08217	//sha512su0 v23.16b,v16.16b
 	ext	v7.16b,v19.16b,v20.16b,#8
 .inst	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1400,7 +1400,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec08230	//sha512su0 v16.16b,v17.16b
 	ext	v7.16b,v20.16b,v21.16b,#8
 .inst	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1412,7 +1412,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec08251	//sha512su0 v17.16b,v18.16b
 	ext	v7.16b,v21.16b,v22.16b,#8
 .inst	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1424,7 +1424,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec08272	//sha512su0 v18.16b,v19.16b
 	ext	v7.16b,v22.16b,v23.16b,#8
 .inst	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1436,7 +1436,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec08293	//sha512su0 v19.16b,v20.16b
 	ext	v7.16b,v23.16b,v16.16b,#8
 .inst	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1448,7 +1448,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec082b4	//sha512su0 v20.16b,v21.16b
 	ext	v7.16b,v16.16b,v17.16b,#8
 .inst	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1460,7 +1460,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec082d5	//sha512su0 v21.16b,v22.16b
 	ext	v7.16b,v17.16b,v18.16b,#8
 .inst	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1472,7 +1472,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xcec082f6	//sha512su0 v22.16b,v23.16b
 	ext	v7.16b,v18.16b,v19.16b,#8
 .inst	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1484,7 +1484,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xcec08217	//sha512su0 v23.16b,v16.16b
 	ext	v7.16b,v19.16b,v20.16b,#8
 .inst	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1497,7 +1497,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
 	rev64	v16.16b,v16.16b
 	add	v0.2d,v3.2d,v4.2d		// "D + T1"
@@ -1508,7 +1508,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
 	rev64	v17.16b,v17.16b
 	add	v3.2d,v2.2d,v1.2d		// "D + T1"
@@ -1519,7 +1519,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
 	rev64	v18.16b,v18.16b
 	add	v2.2d,v4.2d,v0.2d		// "D + T1"
@@ -1530,7 +1530,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
 	rev64	v19.16b,v19.16b
 	add	v4.2d,v1.2d,v3.2d		// "D + T1"
@@ -1541,7 +1541,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
 	rev64	v20.16b,v20.16b
 	add	v1.2d,v0.2d,v2.2d		// "D + T1"
@@ -1552,7 +1552,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
 	rev64	v21.16b,v21.16b
 	add	v0.2d,v3.2d,v4.2d		// "D + T1"
@@ -1563,23 +1563,23 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v24.2d		// "T1 + H + K512[i]"
 .inst	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
 	rev64	v22.16b,v22.16b
 	add	v3.2d,v2.2d,v1.2d		// "D + T1"
 .inst	0xce648441	//sha512h2 v1.16b,v2.16b,v4.16b
-	sub	x3,x3,#80*8	// rewind
+	sub	x3,x3,#80*8		// rewind
 	add	v25.2d,v25.2d,v23.2d
 	ld1	{v23.16b},[x1],#16		// load next input
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v25.2d		// "T1 + H + K512[i]"
 .inst	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
 	rev64	v23.16b,v23.16b
 	add	v2.2d,v4.2d,v0.2d		// "D + T1"
 .inst	0xce618480	//sha512h2 v0.16b,v4.16b,v1.16b
-	add	v0.2d,v0.2d,v26.2d			// accumulate
+	add	v0.2d,v0.2d,v26.2d		// accumulate
 	add	v1.2d,v1.2d,v27.2d
 	add	v2.2d,v2.2d,v28.2d
 	add	v3.2d,v3.2d,v29.2d

gen/bcm/sha512-armv8-win.S

diff --git a/gen/bcm/sha512-armv8-win.S b/gen/bcm/sha512-armv8-win.S
index 7b09813..d8610ac 100644
--- a/gen/bcm/sha512-armv8-win.S
+++ b/gen/bcm/sha512-armv8-win.S
@@ -1106,17 +1106,17 @@
 	ld1	{v24.2d},[x3],#16
 	subs	x2,x2,#1
 	sub	x4,x1,#128
-	orr	v26.16b,v0.16b,v0.16b			// offload
+	orr	v26.16b,v0.16b,v0.16b		// offload
 	orr	v27.16b,v1.16b,v1.16b
 	orr	v28.16b,v2.16b,v2.16b
 	orr	v29.16b,v3.16b,v3.16b
-	csel	x1,x1,x4,ne			// conditional rewind
+	csel	x1,x1,x4,ne				// conditional rewind
 	add	v24.2d,v24.2d,v16.2d
 	ld1	{v25.2d},[x3],#16
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08230	//sha512su0 v16.16b,v17.16b
 	ext	v7.16b,v20.16b,v21.16b,#8
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1128,7 +1128,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08251	//sha512su0 v17.16b,v18.16b
 	ext	v7.16b,v21.16b,v22.16b,#8
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1140,7 +1140,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08272	//sha512su0 v18.16b,v19.16b
 	ext	v7.16b,v22.16b,v23.16b,#8
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1152,7 +1152,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08293	//sha512su0 v19.16b,v20.16b
 	ext	v7.16b,v23.16b,v16.16b,#8
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1164,7 +1164,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082b4	//sha512su0 v20.16b,v21.16b
 	ext	v7.16b,v16.16b,v17.16b,#8
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1176,7 +1176,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec082d5	//sha512su0 v21.16b,v22.16b
 	ext	v7.16b,v17.16b,v18.16b,#8
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1188,7 +1188,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082f6	//sha512su0 v22.16b,v23.16b
 	ext	v7.16b,v18.16b,v19.16b,#8
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1200,7 +1200,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08217	//sha512su0 v23.16b,v16.16b
 	ext	v7.16b,v19.16b,v20.16b,#8
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1212,7 +1212,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08230	//sha512su0 v16.16b,v17.16b
 	ext	v7.16b,v20.16b,v21.16b,#8
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1224,7 +1224,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08251	//sha512su0 v17.16b,v18.16b
 	ext	v7.16b,v21.16b,v22.16b,#8
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1236,7 +1236,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08272	//sha512su0 v18.16b,v19.16b
 	ext	v7.16b,v22.16b,v23.16b,#8
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1248,7 +1248,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08293	//sha512su0 v19.16b,v20.16b
 	ext	v7.16b,v23.16b,v16.16b,#8
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1260,7 +1260,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082b4	//sha512su0 v20.16b,v21.16b
 	ext	v7.16b,v16.16b,v17.16b,#8
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1272,7 +1272,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec082d5	//sha512su0 v21.16b,v22.16b
 	ext	v7.16b,v17.16b,v18.16b,#8
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1284,7 +1284,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082f6	//sha512su0 v22.16b,v23.16b
 	ext	v7.16b,v18.16b,v19.16b,#8
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1296,7 +1296,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08217	//sha512su0 v23.16b,v16.16b
 	ext	v7.16b,v19.16b,v20.16b,#8
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1308,7 +1308,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08230	//sha512su0 v16.16b,v17.16b
 	ext	v7.16b,v20.16b,v21.16b,#8
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1320,7 +1320,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08251	//sha512su0 v17.16b,v18.16b
 	ext	v7.16b,v21.16b,v22.16b,#8
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1332,7 +1332,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08272	//sha512su0 v18.16b,v19.16b
 	ext	v7.16b,v22.16b,v23.16b,#8
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1344,7 +1344,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08293	//sha512su0 v19.16b,v20.16b
 	ext	v7.16b,v23.16b,v16.16b,#8
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1356,7 +1356,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082b4	//sha512su0 v20.16b,v21.16b
 	ext	v7.16b,v16.16b,v17.16b,#8
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1368,7 +1368,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec082d5	//sha512su0 v21.16b,v22.16b
 	ext	v7.16b,v17.16b,v18.16b,#8
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1380,7 +1380,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082f6	//sha512su0 v22.16b,v23.16b
 	ext	v7.16b,v18.16b,v19.16b,#8
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1392,7 +1392,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08217	//sha512su0 v23.16b,v16.16b
 	ext	v7.16b,v19.16b,v20.16b,#8
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1404,7 +1404,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08230	//sha512su0 v16.16b,v17.16b
 	ext	v7.16b,v20.16b,v21.16b,#8
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1416,7 +1416,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08251	//sha512su0 v17.16b,v18.16b
 	ext	v7.16b,v21.16b,v22.16b,#8
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1428,7 +1428,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec08272	//sha512su0 v18.16b,v19.16b
 	ext	v7.16b,v22.16b,v23.16b,#8
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1440,7 +1440,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08293	//sha512su0 v19.16b,v20.16b
 	ext	v7.16b,v23.16b,v16.16b,#8
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
@@ -1452,7 +1452,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082b4	//sha512su0 v20.16b,v21.16b
 	ext	v7.16b,v16.16b,v17.16b,#8
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
@@ -1464,7 +1464,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec082d5	//sha512su0 v21.16b,v22.16b
 	ext	v7.16b,v17.16b,v18.16b,#8
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
@@ -1476,7 +1476,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xcec082f6	//sha512su0 v22.16b,v23.16b
 	ext	v7.16b,v18.16b,v19.16b,#8
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
@@ -1488,7 +1488,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xcec08217	//sha512su0 v23.16b,v16.16b
 	ext	v7.16b,v19.16b,v20.16b,#8
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
@@ -1501,7 +1501,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
 	rev64	v16.16b,v16.16b
 	add	v0.2d,v3.2d,v4.2d		// "D + T1"
@@ -1512,7 +1512,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
 	rev64	v17.16b,v17.16b
 	add	v3.2d,v2.2d,v1.2d		// "D + T1"
@@ -1523,7 +1523,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
 	rev64	v18.16b,v18.16b
 	add	v2.2d,v4.2d,v0.2d		// "D + T1"
@@ -1534,7 +1534,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v2.16b,v3.16b,#8
 	ext	v6.16b,v1.16b,v2.16b,#8
-	add	v3.2d,v3.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v3.2d,v3.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xce6680a3	//sha512h v3.16b,v5.16b,v6.16b
 	rev64	v19.16b,v19.16b
 	add	v4.2d,v1.2d,v3.2d		// "D + T1"
@@ -1545,7 +1545,7 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v4.16b,v2.16b,#8
 	ext	v6.16b,v0.16b,v4.16b,#8
-	add	v2.2d,v2.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v2.2d,v2.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xce6680a2	//sha512h v2.16b,v5.16b,v6.16b
 	rev64	v20.16b,v20.16b
 	add	v1.2d,v0.2d,v2.2d		// "D + T1"
@@ -1556,7 +1556,7 @@
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v1.16b,v4.16b,#8
 	ext	v6.16b,v3.16b,v1.16b,#8
-	add	v4.2d,v4.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v4.2d,v4.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xce6680a4	//sha512h v4.16b,v5.16b,v6.16b
 	rev64	v21.16b,v21.16b
 	add	v0.2d,v3.2d,v4.2d		// "D + T1"
@@ -1567,23 +1567,23 @@
 	ext	v24.16b,v24.16b,v24.16b,#8
 	ext	v5.16b,v0.16b,v1.16b,#8
 	ext	v6.16b,v2.16b,v0.16b,#8
-	add	v1.2d,v1.2d,v24.2d			// "T1 + H + K512[i]"
+	add	v1.2d,v1.2d,v24.2d		// "T1 + H + K512[i]"
 .long	0xce6680a1	//sha512h v1.16b,v5.16b,v6.16b
 	rev64	v22.16b,v22.16b
 	add	v3.2d,v2.2d,v1.2d		// "D + T1"
 .long	0xce648441	//sha512h2 v1.16b,v2.16b,v4.16b
-	sub	x3,x3,#80*8	// rewind
+	sub	x3,x3,#80*8		// rewind
 	add	v25.2d,v25.2d,v23.2d
 	ld1	{v23.16b},[x1],#16		// load next input
 	ext	v25.16b,v25.16b,v25.16b,#8
 	ext	v5.16b,v3.16b,v0.16b,#8
 	ext	v6.16b,v4.16b,v3.16b,#8
-	add	v0.2d,v0.2d,v25.2d			// "T1 + H + K512[i]"
+	add	v0.2d,v0.2d,v25.2d		// "T1 + H + K512[i]"
 .long	0xce6680a0	//sha512h v0.16b,v5.16b,v6.16b
 	rev64	v23.16b,v23.16b
 	add	v2.2d,v4.2d,v0.2d		// "D + T1"
 .long	0xce618480	//sha512h2 v0.16b,v4.16b,v1.16b
-	add	v0.2d,v0.2d,v26.2d			// accumulate
+	add	v0.2d,v0.2d,v26.2d		// accumulate
 	add	v1.2d,v1.2d,v27.2d
 	add	v2.2d,v2.2d,v28.2d
 	add	v3.2d,v3.2d,v29.2d