crypto/sha/asm/sha[1,512]-x86_64.pl: Windows build
This change stops the Intel, SHA instruction code from breaking the
Windows build.
diff --git a/crypto/sha/asm/sha1-x86_64.pl b/crypto/sha/asm/sha1-x86_64.pl
index 272dcfa..fe66cfe 100644
--- a/crypto/sha/asm/sha1-x86_64.pl
+++ b/crypto/sha/asm/sha1-x86_64.pl
@@ -1831,7 +1831,9 @@
jmp .Lcommon_seh_tail
.size se_handler,.-se_handler
+___
+$code.=<<___ if ($shaext);
.type shaext_handler,\@abi-omnipotent
.align 16
shaext_handler:
@@ -1864,7 +1866,9 @@
jmp .Lcommon_seh_tail
.size shaext_handler,.-shaext_handler
+___
+$code.=<<___;
.type ssse3_handler,\@abi-omnipotent
.align 16
ssse3_handler:
@@ -1987,9 +1991,13 @@
.LSEH_info_sha1_block_data_order:
.byte 9,0,0,0
.rva se_handler
+___
+$code.=<<___ if ($shaext);
.LSEH_info_sha1_block_data_order_shaext:
.byte 9,0,0,0
.rva shaext_handler
+___
+$code.=<<___;
.LSEH_info_sha1_block_data_order_ssse3:
.byte 9,0,0,0
.rva ssse3_handler
diff --git a/crypto/sha/asm/sha512-x86_64.pl b/crypto/sha/asm/sha512-x86_64.pl
index bc5620d..4497af5 100644
--- a/crypto/sha/asm/sha512-x86_64.pl
+++ b/crypto/sha/asm/sha512-x86_64.pl
@@ -123,7 +123,7 @@
$avx = ($1>=10) + ($1>=11);
}
-$shaext=1; ### set to zero if compiling for 1.0.1
+$shaext=0; ### set to zero if compiling for 1.0.1
$avx=1 if (!$shaext && $avx);
open OUT,"| \"$^X\" $xlate $flavour";
@@ -2258,7 +2258,8 @@
pop %rsi
ret
.size se_handler,.-se_handler
-
+___
+$code.=<<___ if ($shaext);
.type shaext_handler,\@abi-omnipotent
.align 16
shaext_handler:
@@ -2291,7 +2292,8 @@
jmp .Lin_prologue
.size shaext_handler,.-shaext_handler
-
+___
+$code.=<<___;
.section .pdata
.align 4
.rva .LSEH_begin_$func
@@ -2331,10 +2333,12 @@
.rva se_handler
.rva .Lprologue,.Lepilogue # HandlerData[]
___
-$code.=<<___ if ($SZ==4);
+$code.=<<___ if ($SZ==4 && $shaext);
.LSEH_info_${func}_shaext:
.byte 9,0,0,0
.rva shaext_handler
+___
+$code.=<<___ if ($SZ==4);
.LSEH_info_${func}_ssse3:
.byte 9,0,0,0
.rva se_handler
