Pierre-Clément Tosi | c49cb59 | 2023-04-05 12:34:30 +0100 | [diff] [blame] | 1 | /* Copyright (c) 2023, Google Inc. |
| 2 | * |
| 3 | * Permission to use, copy, modify, and/or distribute this software for any |
| 4 | * purpose with or without fee is hereby granted, provided that the above |
| 5 | * copyright notice and this permission notice appear in all copies. |
| 6 | * |
| 7 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 8 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 9 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY |
| 10 | * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 11 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION |
| 12 | * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN |
| 13 | * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ |
| 14 | |
| 15 | #include "internal.h" |
| 16 | |
David Benjamin | d95b03c | 2023-07-27 10:19:40 -0700 | [diff] [blame] | 17 | // While Arm system registers are normally not available to userspace, FreeBSD |
| 18 | // expects userspace to simply read them. It traps the reads and fills in CPU |
| 19 | // capabilities. |
Pierre-Clément Tosi | c49cb59 | 2023-04-05 12:34:30 +0100 | [diff] [blame] | 20 | #if defined(OPENSSL_AARCH64) && !defined(OPENSSL_STATIC_ARMCAP) && \ |
David Benjamin | d95b03c | 2023-07-27 10:19:40 -0700 | [diff] [blame] | 21 | (defined(ANDROID_BAREMETAL) || defined(OPENSSL_FREEBSD)) |
Pierre-Clément Tosi | c49cb59 | 2023-04-05 12:34:30 +0100 | [diff] [blame] | 22 | |
| 23 | #include <openssl/arm_arch.h> |
| 24 | |
| 25 | #define ID_AA64PFR0_EL1_ADVSIMD 5 |
| 26 | |
| 27 | #define ID_AA64ISAR0_EL1_AES 1 |
| 28 | #define ID_AA64ISAR0_EL1_SHA1 2 |
| 29 | #define ID_AA64ISAR0_EL1_SHA2 3 |
| 30 | |
| 31 | #define NBITS_ID_FIELD 4 |
| 32 | |
| 33 | #define READ_SYSREG(name) \ |
| 34 | ({ \ |
| 35 | uint64_t _r; \ |
| 36 | __asm__("mrs %0, " name : "=r"(_r)); \ |
| 37 | _r; \ |
| 38 | }) |
| 39 | |
| 40 | static unsigned get_id_field(uint64_t reg, unsigned field) { |
| 41 | return (reg >> (field * NBITS_ID_FIELD)) & ((1 << NBITS_ID_FIELD) - 1); |
| 42 | } |
| 43 | |
| 44 | static int get_signed_id_field(uint64_t reg, unsigned field) { |
| 45 | unsigned value = get_id_field(reg, field); |
| 46 | if (value & (1 << (NBITS_ID_FIELD - 1))) { |
| 47 | return (int)(value | (UINT64_MAX << NBITS_ID_FIELD)); |
| 48 | } else { |
| 49 | return (int)value; |
| 50 | } |
| 51 | } |
| 52 | |
| 53 | static uint32_t read_armcap(void) { |
| 54 | uint32_t armcap = ARMV7_NEON; |
| 55 | |
| 56 | uint64_t id_aa64pfr0_el1 = READ_SYSREG("id_aa64pfr0_el1"); |
| 57 | |
| 58 | if (get_signed_id_field(id_aa64pfr0_el1, ID_AA64PFR0_EL1_ADVSIMD) < 0) { |
| 59 | // If AdvSIMD ("NEON") is missing, don't report other features either. |
| 60 | // This matches OpenSSL. |
| 61 | return 0; |
| 62 | } |
| 63 | |
| 64 | uint64_t id_aa64isar0_el1 = READ_SYSREG("id_aa64isar0_el1"); |
| 65 | |
| 66 | unsigned aes = get_id_field(id_aa64isar0_el1, ID_AA64ISAR0_EL1_AES); |
| 67 | if (aes > 0) { |
| 68 | armcap |= ARMV8_AES; |
| 69 | } |
| 70 | if (aes > 1) { |
| 71 | armcap |= ARMV8_PMULL; |
| 72 | } |
| 73 | |
| 74 | unsigned sha1 = get_id_field(id_aa64isar0_el1, ID_AA64ISAR0_EL1_SHA1); |
| 75 | if (sha1 > 0) { |
| 76 | armcap |= ARMV8_SHA1; |
| 77 | } |
| 78 | |
| 79 | unsigned sha2 = get_id_field(id_aa64isar0_el1, ID_AA64ISAR0_EL1_SHA2); |
| 80 | if (sha2 > 0) { |
| 81 | armcap |= ARMV8_SHA256; |
| 82 | } |
| 83 | if (sha2 > 1) { |
| 84 | armcap |= ARMV8_SHA512; |
| 85 | } |
| 86 | |
| 87 | return armcap; |
| 88 | } |
| 89 | |
Pierre-Clément Tosi | c49cb59 | 2023-04-05 12:34:30 +0100 | [diff] [blame] | 90 | void OPENSSL_cpuid_setup(void) { OPENSSL_armcap_P |= read_armcap(); } |
| 91 | |
David Benjamin | d95b03c | 2023-07-27 10:19:40 -0700 | [diff] [blame] | 92 | #endif // OPENSSL_AARCH64 && !OPENSSL_STATIC_ARMCAP && |
| 93 | // (ANDROID_BAREMETAL || OPENSSL_FREEBSD) |