)]}'
{
  "commit": "eb57cc1e875d3137aa3cf723f3c525e253ddea9b",
  "tree": "b7d22c3a9f80661bd9d7a202d3dc004f462a8de3",
  "parents": [
    "f8047e2d47386b218204267de2ede43af2931875"
  ],
  "author": {
    "name": "David Benjamin",
    "email": "davidben@google.com",
    "time": "Tue Dec 01 11:14:41 2020 -0500"
  },
  "committer": {
    "name": "CQ bot account: commit-bot@chromium.org",
    "email": "commit-bot@chromium.org",
    "time": "Tue Dec 01 22:41:33 2020 +0000"
  },
  "message": "aesv8-armx.pl: avoid 32-bit lane assignment in CTR mode\n\nARM Cortex-A57 and Cortex-A72 cores running in 32-bit mode are affected\nby silicon errata #1742098 [0] and #1655431 [1], respectively, where the\nsecond instruction of a AES instruction pair may execute twice if an\ninterrupt is taken right after the first instruction consumes an input\nregister of which a single 32-bit lane has been updated the last time it\nwas modified.\n\nShuffle the counter assignments around a bit so that the most recent\nupdates when the AES instruction pair executes are 128-bit wide.\n\n[0] ARM-EPM-049219 v23 Cortex-A57 MPCore Software Developers Errata Notice\n[1] ARM-EPM-012079 v11.0 Cortex-A72 MPCore Software Developers Errata Notice\n\n(This is imported from upstream\u0027s\n409c59e8f44ae56f2587cdd8a7ce611d0e3d91d9.)\n\nThe change is applied to both 32-bit and 64-bit for simplicity, but there\nwas no measurable performance difference, so leaving them aligned is\neasiest.\n\nChange-Id: Ic8e5f656f59ae8c2ecb2762a066c2c9064bb34c5\nReviewed-on: https://boringssl-review.googlesource.com/c/boringssl/+/44284\nCommit-Queue: David Benjamin \u003cdavidben@google.com\u003e\nReviewed-by: Adam Langley \u003cagl@google.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "a2825ceaf3a388389c67c7e40d1f04f2832a03bf",
      "old_mode": 33188,
      "old_path": "crypto/fipsmodule/aes/asm/aesv8-armx.pl",
      "new_id": "1a2c20b78ffd5aac390fda411312316776f85be4",
      "new_mode": 33188,
      "new_path": "crypto/fipsmodule/aes/asm/aesv8-armx.pl"
    }
  ]
}