)]}'
{
  "commit": "c7bec85f2b8e4daa28391c3805c87a3fc2ad1582",
  "tree": "121df1b057a11975fa32999225cbddd7cdad3034",
  "parents": [
    "de614d890235236af3cf5ad6aa5ab762750f4a15"
  ],
  "author": {
    "name": "Eric Biggers",
    "email": "ebiggers@google.com",
    "time": "Wed Mar 19 07:04:03 2025 -0700"
  },
  "committer": {
    "name": "Boringssl LUCI CQ",
    "email": "boringssl-scoped@luci-project-accounts.iam.gserviceaccount.com",
    "time": "Wed Mar 19 15:20:44 2025 -0700"
  },
  "message": "Rename avx10 and avx10_512 to avx512\n\nIntel has made a late change to the AVX10 specification that removes\nsupport for maximum vector lengths other than 512 bits.  Therefore,\nthere won\u0027t be any such thing as AVX10/256.  AVX10 will just be what was\noriginally planned to be called AVX10/512, effectively just\nconsolidating the AVX512 CPUID feature bits.\n\nIn light of this development and the fact that the 256-bit support in\naes-gcm-avx10-x86_64.pl didn\u0027t end up being used, the early adoption of\nthe \"avx10\", \"avx10_256\", and \"avx10_512\" names no longer makes sense.\nSo let\u0027s just use \"avx512\" instead.\n\nRename file names and function names accordingly, and update some\ncomments.  No functional changes.\n\nChange-Id: I2d59912b72d5ca0679b0ea54ae770a672ca36dea\nReviewed-on: https://boringssl-review.googlesource.com/c/boringssl/+/77847\nReviewed-by: David Benjamin \u003cdavidben@google.com\u003e\nCommit-Queue: David Benjamin \u003cdavidben@google.com\u003e\n",
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