)]}'
{
  "commit": "2d94b5e1ee99a22c2fd3bb3b3dd5b4e3be6b3cc6",
  "tree": "ffd5e1ed7f1af2d15860575d1246bbb806b4bcf8",
  "parents": [
    "824867d11061b2e7d03bd88c700093d3098373f8"
  ],
  "author": {
    "name": "Eric Biggers",
    "email": "ebiggers@google.com",
    "time": "Tue Aug 20 23:24:14 2024 +0000"
  },
  "committer": {
    "name": "Boringssl LUCI CQ",
    "email": "boringssl-scoped@luci-project-accounts.iam.gserviceaccount.com",
    "time": "Wed Aug 28 19:28:37 2024 +0000"
  },
  "message": "Support detecting AVX512BW, AVX512VL, VAES, and VPCLMULQDQ\n\nAdd helper functions that check the AVX512BW, AVX512VL, VAES, and\nVPCLMULQDQ feature bits in the CPU capability words.  Also, make sure\nthat OPENSSL_cpuid_setup() clears VAES and VPCLMULQDQ when they are\nunsupported due to the operating system not supporting ymm registers.\n\nChange-Id: I2d672556acc269ef09ab6f5e080d37cb9831e7ce\nReviewed-on: https://boringssl-review.googlesource.com/c/boringssl/+/68908\nCommit-Queue: Bob Beck \u003cbbe@google.com\u003e\nReviewed-by: Bob Beck \u003cbbe@google.com\u003e\nReviewed-by: David Benjamin \u003cdavidben@google.com\u003e\nAuto-Submit: Eric Biggers \u003cebiggers@google.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "3453fa39145e2efdab1b3d83a8dd819f19788093",
      "old_mode": 33188,
      "old_path": "crypto/cpu_intel.c",
      "new_id": "10e7871e43235f41a53d78073f1e747fa0bb529a",
      "new_mode": 33188,
      "new_path": "crypto/cpu_intel.c"
    },
    {
      "type": "modify",
      "old_id": "209c85a34dc8aabd4beb9176bc57d266483933fe",
      "old_mode": 33188,
      "old_path": "crypto/internal.h",
      "new_id": "4ec12f563be1b3e709150585d20aa45b5372ab3c",
      "new_mode": 33188,
      "new_path": "crypto/internal.h"
    }
  ]
}