)]}'
{
  "commit": "12316ab445eef5317391a94bef733fa6ff175173",
  "tree": "e2e8fc69cd888477eb155c68279e2ad32c5b0d0d",
  "parents": [
    "7cb8df579329b70cd4ede09d6d228636b8e31e89"
  ],
  "author": {
    "name": "David Benjamin",
    "email": "davidben@google.com",
    "time": "Mon Dec 11 21:23:27 2023 -0500"
  },
  "committer": {
    "name": "Boringssl LUCI CQ",
    "email": "boringssl-scoped@luci-project-accounts.iam.gserviceaccount.com",
    "time": "Fri Jan 26 18:15:01 2024 +0000"
  },
  "message": "sha: Move Armv7 dispatching to C (reland)\n\nThis is a reland of\nhttps://boringssl-review.googlesource.com/c/boringssl/+/64749, which was\nreverted in\nhttps://boringssl-review.googlesource.com/c/boringssl/+/65328 due to\nissues in Arm mode (i.e. not Thumb mode) builds that target Armv6+\ninstead of Armv7+.\n\nThe issue was that sha256_block_data_order_nohw has slightly different\nsizes depending on __ARM_ARCH. Prior to moving the dispatch, the sizes\nworked out such that they were always encodable in ADR. After moving the\ndispatch, the instructions got shorter, such that the Armv7+ build still\nworked, but the Armv6+ build needed to encode an offset of 0x1060\n(previously 0x1080), which does not fit.\n\nSee https://alisdair.mcdiarmid.org/arm-immediate-value-encoding/ for\ndetails on Arm\u0027s very fussy immediate value encoding. It\u0027s not the only\nform used for ADR (Thumb2 works very differently), but it\u0027s the\napplicable one here.\n\nWhile we could shuffle things around, this is all far too fragile. Just\nuse the LDR; ADD pattern we used for the other function. ADRL would\navoid a load (it splits the offset into two constants without a constant\nbank), but that\u0027s a pseudo-instruction that\u0027s only supported by gas.\nclang-assembler didn\u0027t want to implement it. Android have a macro at\nhttps://android.googlesource.com/platform/ndk/+/refs/heads/master/docs/ClangMigration.md#arm,\nbut it didn\u0027t work for me when I tried it. Also, searching around, it\nsounds like ADRL in gas only works in Arm mode and not Thumb mode?\n\nWe could probably work through all that, but the compiler emits constant\nbanks on 32-bit Arm all the time. (I got this pattern from Clang\u0027s\noutput.) This is probably not worth the trouble.\n\nBug: 673\nChange-Id: I165544764a931b293aa66fb3fc9bb8f01eeb8092\nReviewed-on: https://boringssl-review.googlesource.com/c/boringssl/+/65808\nCommit-Queue: Bob Beck \u003cbbe@google.com\u003e\nAuto-Submit: David Benjamin \u003cdavidben@google.com\u003e\nReviewed-by: Bob Beck \u003cbbe@google.com\u003e\n",
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